DCC-MB Logic Board

Files to Download

LOGICBRD.GIF 104K GIF Image: Logic Board Schematic Diagram
This is a large image (3000 x 2252 pixels), so I suggest that you save this file to disk, then print it.

ETCHPTRN.ZIP 59K ZIP File: Logic Board Etch Pattern
This ZIP file contains three postscript files created by Bob Milhaupt. The first is a schematic diagram (NOTE: this schematic differs slightly from the original - Bob replaced the two 4-bit latches (74LS75) with a single 8-bit latch (74F573), but the circuit is functionally the same.) The second file is the etch pattern, and the third is the parts layout.

FUNCTION

This circuit reads 8 bits of data at a time from a standard parallel port. These bits are converted into a DCC data stream. When all 8 bits have been sent, the circuit interrupts the computer (again through the parallel port), asking for the next 8 bits to be sent. The output of this circuit is at TTL level (5 volts, low current) and must be converted to DCC level (+/-14 volts, high current) by a "booster".

POWER REQUIREMENTS

A well regulated 5 volt DC power supply is required. This circuit will draw about 150 ma, though you'll probably want more current available for future additions. You can either build a power supply (perhaps as part of the booster), or you can steal power from your computer:

5 volts is available on the 4-pin plastic connectors which provide power for the disk drives. The black wires are both ground, the red wire is +5 volts.

5 volts is also provided on the joystick (game) port. Pins 1, 8, and 9 are +5 volts. Pins 4 and 12 are ground. Note - I don't know how much current you can draw from this port - it may not be enough to run this circuit.

PERTINENT THINGS ABOUT DCC

DCC is a serial protocol. However, it differs from other common serial standards such as RS-232 and MIDI in several significant ways:

- With DCC, bits are sent continuously. There are no pauses between bytes, just a continuous stream of bits. This hardware interface deals with eight of these bits at a time; these eight bits are not necessarily an intact data byte. The hardware couldn't care less - it's the software's job to pack the bit stream into 8-bit pieces.

- DCC encodes each bit as a single cycle of a square wave. A '1' bit has a length (period) of 116 us. A '0' bit is 200 us or more. This interface produces '0' bits that are 232 us, exactly twice the length of a '1' bit. [Note - "zero bit stretching", a motor-cooking way to run one analog loco on a DCC system, is NOT supported.]

How it works

U1 is a 555 oscillator which produces 17240 Hz. U2a is a flip-flop which divides this frequency in half to produce a perfectly symmetric (50.0% duty cycle) square wave at 8620 Hz. This is the CLOCK signal. It is identical to a constant stream of DCC '1' bits.

U3 looks at the clock signal. Each time the clock goes from low to high, U3 produces a pulse on pin 4. And each time the clock goes from high to low, U3 produces a pulse on pin 12.

U2b, another flip-flop, actually produces the DCC signal. This flip-flop is toggled by the pulses coming from U3, pin 4. These pulses alone will toggle the flip-flop once every clock cycle, thus dividing the clock frequency in half. The result is a 4310 Hz square wave - a stream of DCC '0' bits. Now if the pulses from U3, pin 12 are allowed to reset the flip-flop, its output frequency doubles and we get DCC '1' bits. Thus, by turning these pulses (U3 pin 12) on and off, we can produce DCC '0's and '1's. U4 does this job - more on that later.

U5 is a divide-by-eight counter. It simply counts the DCC bits as they come out of U2b. The count goes from 0 to 7, over and over. This count (U5 pins 8, 9, and 12) is used by U4 to select one of the eight data bits provided by the parallel port. If the selected bit is a '0', U4 ignores the pulses coming into its pin 7. If the selected bit is a '1', U4 passes the pulses from pin 7 to pin 6. This is what generates the proper DCC output, as noted above.

U8 detects when U5's count goes from 7 back to 0 - this indicates that 8 new bits are needed from the parallel port. When this happens, U8 pin 13 sends a pulse to latches U6 and U7, which latch the 8 (new) bits currently coming out of the parallel port. Immediately after this, U8 pin 12 sends a pulse to the parallel port which interrupts the computer, asking for the next 8 bits. The computer (through software) then has a complete cycle of this circuit to provide the next 8 bits - plenty of time.

Notes

(1) A 0.1uf bypass capacitor should be added across the supply lines of each chip. These were omitted for clarity.

(2) The oscillator (U1) should have an output frequency of 17241 Hz. (The DCC spec allows for this frequency to range from 16394 Hz. to 18180 Hz.) The frequency is set by the 10K potentiometer, which should be a 10 or 20 turn trimmer. If you don't have access to a frequency counter, you'll have to adjust the oscillator by trial and error. This shouldn't be too hard - assuming that the circuit is working properly. Another option is to build a clock by using a high frequency crystal oscillator and dividing down the frequency. This would cost a bit more, but would be more precise and need no adjustment.

(3) Pins 1, 11, and 16 of the parallel port will be used by the booster as follows: Pin 1 (Out): Switch main track power on and off, via a relay Pin 16 (Out): Switch track power to program mode, via another relay (only a short "program track" gets powered, with limited current.) Pin 11 (In): Read feedback pulses while programming decoders Pins 12, 13, and 15 are available for your own use as digital inputs. Pins 14 and 17 are available for use as digital outputs. The software driver provides access to these extra inputs and outputs.

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